This invention generally relates to output amplifiers such as those used for audio systems and other power applications. More particularly, it relates to offset compensation for an amplifier with a high voltage output stage and lower voltage conditioning circuits.
In many amplifier applications, the amplifier output stage is required to provide AC peak-to-peak load voltage signals that are higher than the supply voltage used for the signal conditioning sections of the amplifier. Operating the signal conditioning circuits at the lower voltage enables a more efficient, lower power and lower cost amplifier. However, a higher voltage is required to drive external components such as speakers in audio applications from a separate higher voltage supply.
Using a prior art circuit having error correction feedback for powering output transistors at a different supply voltage from the conditioning stages results in a lower maximum peak-to-peak voltage output than theoretically possible from the higher voltage supply. FIG. 1 a shows a prior art amplifier circuit, having an output stage 10 with a Vdd supply, and conditioning circuit 20 with a Vcc supply. In this circuit, when no input signal is present, I2 is equal to I1, which is equal to zero. Thus, the output quiescent point is Vcc/2. With the quiescent point at Vcc/2, the output signal is clipped at the bottom of the output signal as shown in FIG. 1b. 
The present invention maximizes the output voltage swing on a high voltage output stage amplifier where the peak-to-peak output voltage signal is higher than the supply voltage used in the signal conditioning circuits of the amplifier. The amplifier allows the maximum peak-to-peak swing on the output stage by shifting the quiescent voltage of the output stage to the midpoint of the output supply voltage. The shift is accomplished by tapping an offset current at the input of the error integrating stage of the amplifier proportional to the difference in the two power supply voltages.
In an embodiment of the present invention a feedback resistor is connected between the output of the high voltage stage and the negative input of the error integrating circuit such that an offset current circuit sinks a current through the feedback resistor to hold the quiescent point of the output stage output to one-half Vdd.
In another embodiment of the present invention the offset current circuit provides a current of (Vdd/2xe2x88x92Vcc/2)/RF, where Vdd is the first supply voltage, Vcc is the second supply voltage, and RF is the feedback resistor.